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DC Field | Value | Language |
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dc.contributor.author | Behara, S. | - |
dc.contributor.author | Sandeep, N. | - |
dc.contributor.author | Yaragatti, Udaykumar R. | - |
dc.date.accessioned | 2020-03-31T08:23:29Z | - |
dc.date.available | 2020-03-31T08:23:29Z | - |
dc.date.issued | 2018 | - |
dc.identifier.citation | IEEE Transactions on Industry Applications, 2018, Vol.54, 5, pp.4632-4639 | en_US |
dc.identifier.uri | https://idr.nitk.ac.in/jspui/handle/123456789/10970 | - |
dc.description.abstract | This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. 1972-2012 IEEE. | en_US |
dc.title | Design and Implementation of Transformer-Based Multilevel Inverter Topology with Reduced Components | en_US |
dc.type | Article | en_US |
Appears in Collections: | 1. Journal Articles |
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