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dc.contributor.authorJohnson, T.
dc.contributor.authorShubhanga, K.N.
dc.date.accessioned2020-03-30T10:18:40Z-
dc.date.available2020-03-30T10:18:40Z-
dc.date.issued2017
dc.identifier.citation1st IEEE International Conference on Power Electronics, Intelligent Control and Energy Systems, ICPEICES 2016, 2017, Vol., , pp.-en_US
dc.identifier.urihttp://idr.nitk.ac.in/jspui/handle/123456789/8427-
dc.description.abstractIn this paper, the influence of HVDC links in interconnected power systems to prevent loop flow, is analysed. To enable this, a two-terminal HVDC link has been modelled in FDLF-based conventional power flow programme. The results of the case studies are presented using a 10-bus two-area modified power system and a 14-bus the IEEE test system, by replacing the AC lines by HVDC links with power-reference specification. � 2016 IEEE.en_US
dc.titleLoop flow performance of interconnected power systems with HVDC linksen_US
dc.typeBook chapteren_US
Appears in Collections:2. Conference Papers

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